sequential circuit
英 [sɪˈkwenʃl ˈsɜːkɪt]
美 [sɪˈkwenʃl ˈsɜːrkɪt]
网络 时序电路; 循序电路; 顺序电路; 依序数位系统
双语例句
- If the unknown flip-flops exist in a sequential circuit, the test generation of the circuit can not be achieved easily.
当时序电路中有未确定状态的触发器时，就不能顺利完成该电路的测试生成，因此初始化是时序电路测试生成中的关键问题。 - Interlocked flip-flop and its application to multi-input asynchronous sequential circuit design
互锁触发器及其在设计多输入异步时序电路中的应用 - Mechanism about the clock skew of synchronism sequential circuit has been presented, based on analyzing the characteristics of programmable resources and sequential circuit in FPGA.
在分析星载FPGA内时序电路特性以及FPGA可编程资源特性的基础上，指出了FPGA内同步时序电路出现时钟偏斜现象的机理。 - The research of this paper is based on the Bounded Model Checking of sequential circuit.
本文研究工作是针对时序电路的有界模型检验进行展开的。 - Multiple Fault Testing of Synchronous Sequential Circuit with Dynamic Boolean Equation Method
同步时序线路多故障测试的动态布尔方程方法 - A method of redundancy removal in the synchronous sequential circuit is presented in this paper.
提出了一种去除同步时序电路中冗余逻辑的方法。 - This paper presents a new method to design asynchronous sequential circuit: clock signals and secondary state Karnaugy Map uniting method.
提出了一种异步时序电路设计的新方法：时钟信号与次态卡诺图联立法。 - The Application of PSPICE for Pulse Nonsynchronous Sequential Circuit Analysis
Pspice在脉冲异步时序电路分析中的应用 - Sequential Circuit Design Using MSI Shift Register
应用MSI移位寄存器设计时序电路的新方法 - A new method of synchronous sequential circuit design
同步时序电路设计新方法 - The problem is timing in iterative array model. This paper discusses this problem, and gives an improved algorithm for sequential circuit testing generation.
本文针对迭代组合阵列模型测试中产生的这些问题进行了有益的探讨，并提出了改进的时序电路测试产生算法，使之更加完善。 - Research and Implementation of the Fault Simulation Speed up Method for the Synchronous Sequential Circuit
同步时序电路故障模拟加速方法研究与实现 - Verification method based state table and method based state chart are compared for the first time, and characteristics of two methods and fitting sequential circuit methods are summarized.
本文首次比较基于状态转换表和基于状态转换图的功能验证方法，并总结出两种方法各自的特点和适合时序电路功能验证的方法，为验证工程师挑选验证方案提供了有利的数据支持。 - State Assignment and Conversion in Sequential Circuit Design
时序电路设计中的状态指定及状态转换 - A complete method for deciding and solving the "Hang up" in sequential circuit design is given.
给出设计过程中判断和解决挂起现象的完整方法。 - The article gives the principle, method and applied example of the EPROM used as sequential circuit design.
介绍了用EPROM进行时序电路设计的原理、方法和应用实例。 - A Method of Sequential Circuit Design on the Basis of EPROM and Use
一种基于EPROM的时序电路设计方法及应用 - Fault Testability Analysis for Sequential Circuit
时序电路故障可测性分析 - This paper presents an adiabatic cross-coupled flip-flops and a synthesis of adiabatic synchronous sequential circuit.
本文提出交叉耦合绝热动态触发器及其同步时序电路综合方法。 - Especially, the paper presents a solution to simulation of sequential circuit, which consists of continuance-segment simulation model.
同时，本文还针对时序电路的仿真，总结出持续-分段仿真模型并深入阐述了该模型的实现算法和关键技术。 - Testing generation for faults not testable is an important factor that reduces the efficiency of sequential circuit testing generation.
对不可测故障进行测试产生是影响时序电路测试产生效率的一个重要因素。 - Two test technologies state stable based technology and automatic test technology are given for the test of logic functions of sequential circuit.
及对时序电路逻辑功能的两种检测技术：基于状态表的测试技术和自动检测技术。 - A Study on Retiming Algorithm in the Synchronous Sequential Circuit
同步时序电路中的重定时算法研究 - So to the sequential circuit, the method based state chart is more suitable.
所以对于时序电路而言，基于状态转换图的方法是更加适合的验证方法。 - A decade counter was used to illustrate the design of energy recovery sequential circuit using the proposed JK flip-flops.
应用绝热JK触发器，并以十进制加法计数器为例演示了能量恢复型时序电路的设计。 - This paper is a discussion on some teaching methods of the simplification for Karnaugh map, the analysis of sequential circuit and the teaching of integrated circuits.
对数字电路中卡诺图化简、时序电路分析和集成电路教学等三个问题的教学方法进行一定的分析和探讨。 - A Design of Sequential Circuit base on FPGA in the Signal Processing System of Satellite
卫星信息处理系统中基于FPGA的时序电路设计 - However, the existing circuit parallel test generation algorithms fail get good results, especially for sequential circuit.
然而，已有的电路并行测试生成算法并未取得理想的结果，尤其对时序电路。 - Fault diagnosis of the control circuit is researched, and some relative diagnosis ways are given for the test of a few fault phenomena of the combinational logic circuit and the sequential circuit.
通过对控制电路系统故障诊断的研究，对组合逻辑电路的多种故障现象以及时序逻辑电路给出了对应的测试与诊断方法，并提出了控制系统对转子中心位置的搜索方法。 - Model checking is a kind of formal verifying technology. This technology is widely used in verifying field of sequential circuit design and communication protocol design.
模型检测是一种形式化验证技术，该技术在时序电路设计和通信协议设计的验证领域得到了广泛应用。